For example, a structure in which an OTP (onetime-programmable) element is sandwiched between multilayer interconnections and a structure in which a plurality of layers of NAND flash memory is formed by repeating epitaxial growth of a silicon film have been proposed as technologies to realize higher densities of memory without relying on lithography. However, these structures have a problem of an increasing number of layers and an increasing number of times of lithography. Thus, a three-dimensional lamination-type vertical memory is proposed.
In a three-dimensional memory, a cylindrical hole (memory hole) is opened collectively in a plurality of electrodes laminated on a semiconductor substrate, a memory film is formed on an inner wall of the hole, and then a polysilicon film (silicon pillar) is formed inside the hole. Accordingly, a memory string serially connected in a laminating direction and formed from a plurality of MONOS memory cells can be formed collectively.
In a MONOS memory cell, a challenge is to improve data retaining (charge retaining) characteristics. Particularly in data retaining after repeating write/erase operations, the distribution of threshold voltage in the memory cell spreads, which may make data discrimination difficult. This applies not only to plane MONOS memory cells, but also to cylindrical MONOS memory cells. Particularly in cylindrical MONOS memory cells, the magnitude of electric field varies in the diameter direction and a solution of data retaining in consideration of different electric fields is needed.